With all the hoopla over programming Field Programmable Gate Arrays (FPGAs) using OpenCL, you might think that HDL programming (Verilog or VHDL) for FPGAs was dead.

The reality is that OpenCL opens new ways to program FPGAs, but it doesn’t replace the old tried and true HDL programming methods.
It’s another case of using the right tool for the right job.Why do we need HDLs when we have OpenCL?FPGAs are essentially a bunch of circuits, wires, and pins ready to be wired. When we think of them that way, then Verilog or VHDL is the way to go.  A newer view of FPGAs has them function as application accelerators. (I discussed this recently in “FPGAs and OpenCL: What’s Up?”) When thinking of FPGAs as accelerators for computation, OpenCL is the way to go. OpenCL handles many details, such as memory usage and I/O, in a standard way that allows us to focus on acceleration of computation.To read this article in full, please click here

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